TY - GEN
T1 - An affordable post-silicon testing framework applied to a RISC-V based microcontroller
AU - Molina-Robles, Roberto
AU - Garcia-Ramirez, Ronny
AU - Chacon-Rodriguez, Alfonso
AU - Rimolo-Donadio, Renato
AU - Arnaud, Alfredo
N1 - Publisher Copyright:
© 2021 IEEE.
PY - 2021/4/19
Y1 - 2021/4/19
N2 - The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller the framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication the platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.
AB - The RISC-V architecture is a very attractive option for developing application specific systems needing an affordable yet efficient central processing unit. Post-silicon validation on RISC-V applications has been done in industry for a while, however documentation is scarce. This paper proposes a practical low-cost post-silicon testing framework applied to a RISC-V RV32I based microcontroller the framework uses FPGA-based emulation as a cornerstone to test the microcontroller before and after its fabrication the platform only requires a handful of elements like the FPGA, a PC, the fabricated chip and some discrete components, without losing the capacity to functionally validate the design under test and save development testing time by using a re-utilize philosophy.
KW - EDA tools
KW - FPGA
KW - I/O protocols
KW - Post-silicon validation
KW - RISC-V
KW - SPI
KW - architecture
KW - microcontroller
KW - test generation
KW - testing
KW - testing-platforms
UR - https://www.scopus.com/pages/publications/85108224625
U2 - 10.1109/LAEDC51812.2021.9437939
DO - 10.1109/LAEDC51812.2021.9437939
M3 - Contribución a la conferencia
AN - SCOPUS:85108224625
T3 - LAEDC 2021 - IEEE Latin America Electron Devices Conference
BT - LAEDC 2021 - IEEE Latin America Electron Devices Conference
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 3rd IEEE Latin America Electron Devices Conference, LAEDC 2021
Y2 - 19 April 2021 through 21 April 2021
ER -