Abstract
In this work, Siwa, a micropower 32-bits RISC-V core aimed at implantable medical SoCs is presented. The core was fabricated in a 180-nm CMOS-HV technology to directly drive biological stimuli circuits within the same ASIC. A complete set of power consumption measurements is presented; the core properly operated up to 30 MHz with a current consumption of 52μA/MHz at 1.8-V supply voltage, and < 20-nA leakages at room temperature. Since the existing benchmarks are not completely adequate to compare Siwa performance to other microcontrollers used on implantable medical devices (IMDs), a simple, specific benchmark inspired in a pacemaker operation was developed. The new benchmark considers both the CPU current consumption and performance, sleep and run states, and allows to compare broadly different CPUs and operating conditions for specific IMD applications. Siwa's performance was compared using this benchmark with 8 and 16-bits MCUs.
| Original language | English |
|---|---|
| Pages (from-to) | 57-60 |
| Number of pages | 4 |
| Journal | IEEE Embedded Systems Letters |
| Volume | 15 |
| Issue number | 2 |
| DOIs | |
| State | Published - 1 Jun 2023 |
UN SDGs
This output contributes to the following UN Sustainable Development Goals (SDGs)
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SDG 7 Affordable and Clean Energy
Keywords
- CPU benchmark
- RISC-V
- medical devices
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