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Characterization of MOS transistor current mismatch

  • H. Klimach
  • , A. Arnaud
  • , M. C. Schneider
  • , C. Galup-Montoro
  • Federal University of Santa Catarina
  • Universidad de la República

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

10 Scopus citations

Abstract

Electron device matching has been a key factor on the performance of today's analog or even digital electronic circuits. This paper presents a study of drain current matching in MOS transistors. CMOS test structures were designed and fabricated as a way to develop an extensive experimental work, where current mismatch was measured under a wide range of bias conditions. A model for MOS transistor mismatch was also developed, using the carrier number fluctuation theory to account for the effects of local doping fluctuations. This model shows a good fitting with measurements over a wide range of operation conditions, from weak to strong inversion, from linear to saturation region, and allows the assessment of mismatch from process and geometric parameters.

Original languageEnglish
Title of host publicationProceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004
PublisherAssociation for Computing Machinery (ACM)
Pages33-38
Number of pages6
ISBN (Print)1581139470, 9781581139471
DOIs
StatePublished - 2004
Externally publishedYes
EventProceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004 - Pernambuco, Brazil
Duration: 7 Sep 200411 Sep 2004

Publication series

NameProceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004

Conference

ConferenceProceedings - 17th Symposium on Integrated Cicuits and Systems Design, SBCCI2004
Country/TerritoryBrazil
CityPernambuco
Period7/09/0411/09/04

Keywords

  • Analog design
  • Compact models
  • MOSFET
  • Matching
  • Mismatch

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