CMOS level shifters from 0 to 18 V output

Joel Gak; Matias Miguez; Alfredo Arnaud

doi:10.1007/s10470-021-01827-w

CMOS level shifters from 0 to 18 V output

Joel Gak, Matias Miguez, Alfredo Arnaud

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

A design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 µm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is common to handle previously unknown voltages either positive or negative, above or below the control logic supply V_DD. Two application examples are presented: a composite switch to control negative stimuli voltage pulses, and a multi-channel programmable charge-pump voltage multiplier, aimed at charging the output capacitors of an IMD.

Original language	English
Pages (from-to)	617-628
Number of pages	12
Journal	Analog Integrated Circuits and Signal Processing
Volume	107
Issue number	3
DOIs	https://doi.org/10.1007/s10470-021-01827-w
State	Published - Jun 2021

Keywords

Biomedical circuits
HV-CMOS
Level shifter

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title = "CMOS level shifters from 0 to 18 V output",

abstract = "A design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 µm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is common to handle previously unknown voltages either positive or negative, above or below the control logic supply VDD. Two application examples are presented: a composite switch to control negative stimuli voltage pulses, and a multi-channel programmable charge-pump voltage multiplier, aimed at charging the output capacitors of an IMD.",

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author = "Joel Gak and Matias Miguez and Alfredo Arnaud",

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T1 - CMOS level shifters from 0 to 18 V output

AU - Gak, Joel

AU - Miguez, Matias

AU - Arnaud, Alfredo

PY - 2021/6

Y1 - 2021/6

N2 - A design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 µm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is common to handle previously unknown voltages either positive or negative, above or below the control logic supply VDD. Two application examples are presented: a composite switch to control negative stimuli voltage pulses, and a multi-channel programmable charge-pump voltage multiplier, aimed at charging the output capacitors of an IMD.

AB - A design methodology for level shifters voltage translators, where the output voltage ranges from 0 to 18 V, and the input voltage ranges from 2 to 5.5 V in a 0.6 µm CMOS-HV technology, is presented. This family of circuits have a special interest in the case of implantable medical devices where is common to handle previously unknown voltages either positive or negative, above or below the control logic supply VDD. Two application examples are presented: a composite switch to control negative stimuli voltage pulses, and a multi-channel programmable charge-pump voltage multiplier, aimed at charging the output capacitors of an IMD.

KW - Biomedical circuits

KW - HV-CMOS

KW - Level shifter

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JO - Analog Integrated Circuits and Signal Processing

JF - Analog Integrated Circuits and Signal Processing

IS - 3

ER -

CMOS level shifters from 0 to 18 V output

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Keywords

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