Abstract
This paper presents a new approach for accurate MOS transistor matching calculation. Our model, which is based on an accurate physics-based MOSFET model, allows the assessment of mismatch from process parameters and is valid for any operating region. Experimental results taken on a test set of transistors implemented in a 1.2 μm CMOS technology corroborate the theoretical development of this work.
Original language | English |
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Pages (from-to) | V-113-V-116 |
Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 5 |
State | Published - 2004 |
Externally published | Yes |
Event | 2004 IEEE International Symposium on Cirquits and Systems - Proceedings - Vancouver, BC, Canada Duration: 23 May 2004 → 26 May 2004 |
Keywords
- Analog design
- Compact models
- MOSFET
- Matching