Abstract
Handling component mismatch represents a great challenge in analog and even digital design for current and future submicron technologies. This article, a special selection from the Symposium on Integrated Circuits and Systems Design (SBCCI), presents a matching model to help designers account for real effects while maintaining simplicity and easing the design effort.
Original language | English |
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Pages (from-to) | 20-29 |
Number of pages | 10 |
Journal | IEEE Design and Test of Computers |
Volume | 23 |
Issue number | 1 |
DOIs | |
State | Published - Jan 2006 |
Externally published | Yes |