On the design of very small transconductance OTAs with reduced input offset

Alfredo Arnaud; Rafaella Florelli; Carlos Galup-Montoro

doi:10.1109/SBCCI.2005.4286825

On the design of very small transconductance OTAs with reduced input offset

Alfredo Arnaud
, Rafaella Florelli
, Carlos Galup-Montoro

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

4 Scopus citations

Abstract

In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without degrading mismatch or noise performance. SP current-division will be then employed to design OTAs ranging from a few pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and with a reduced area. An integrated 3.3s time-constant integrator will also be presented. One-by-one several design non-idealities will be revised: linearity, offset, noise, leakages; as well as layout techniques. A final analysis concludes that SP-association of transistors allows to build very efficient transconductors, for demanding applications in the field of implantable electronics among others.

Original language	English
Title of host publication	SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design
Pages	15-20
Number of pages	6
DOIs	https://doi.org/10.1109/SBCCI.2005.4286825
State	Published - 2005
Externally published	Yes
Event	SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design - Florianopolis, Brazil Duration: 4 Sep 2005 → 7 Sep 2005

Publication series

Name	SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design

Conference

Conference	SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design
Country/Territory	Brazil
City	Florianopolis
Period	4/09/05 → 7/09/05

Keywords

Analog design
CMOS
Low-power

Access to Document

10.1109/SBCCI.2005.4286825

Cite this

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title = "On the design of very small transconductance OTAs with reduced input offset",

abstract = "In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without degrading mismatch or noise performance. SP current-division will be then employed to design OTAs ranging from a few pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and with a reduced area. An integrated 3.3s time-constant integrator will also be presented. One-by-one several design non-idealities will be revised: linearity, offset, noise, leakages; as well as layout techniques. A final analysis concludes that SP-association of transistors allows to build very efficient transconductors, for demanding applications in the field of implantable electronics among others.",

keywords = "Analog design, CMOS, Low-power",

author = "Alfredo Arnaud and Rafaella Florelli and Carlos Galup-Montoro",

year = "2005",

doi = "10.1109/SBCCI.2005.4286825",

language = "Ingl{\'e}s",

isbn = "1595931740",

series = "SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design",

pages = "15--20",

booktitle = "SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design",

note = "SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design ; Conference date: 04-09-2005 Through 07-09-2005",

}

Arnaud, A, Florelli, R & Galup-Montoro, C 2005, On the design of very small transconductance OTAs with reduced input offset. in SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design., 4286825, SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design, pp. 15-20, SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design, Florianopolis, Brazil, 4/09/05. https://doi.org/10.1109/SBCCI.2005.4286825

On the design of very small transconductance OTAs with reduced input offset. / Arnaud, Alfredo; Florelli, Rafaella; Galup-Montoro, Carlos.
SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design. 2005. p. 15-20 4286825 (SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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T1 - On the design of very small transconductance OTAs with reduced input offset

AU - Arnaud, Alfredo

AU - Florelli, Rafaella

AU - Galup-Montoro, Carlos

PY - 2005

Y1 - 2005

N2 - In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without degrading mismatch or noise performance. SP current-division will be then employed to design OTAs ranging from a few pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and with a reduced area. An integrated 3.3s time-constant integrator will also be presented. One-by-one several design non-idealities will be revised: linearity, offset, noise, leakages; as well as layout techniques. A final analysis concludes that SP-association of transistors allows to build very efficient transconductors, for demanding applications in the field of implantable electronics among others.

AB - In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without degrading mismatch or noise performance. SP current-division will be then employed to design OTAs ranging from a few pS to a few nS, with up to 1V linear range, consuming in the order of 100nW, and with a reduced area. An integrated 3.3s time-constant integrator will also be presented. One-by-one several design non-idealities will be revised: linearity, offset, noise, leakages; as well as layout techniques. A final analysis concludes that SP-association of transistors allows to build very efficient transconductors, for demanding applications in the field of implantable electronics among others.

KW - Analog design

KW - CMOS

KW - Low-power

UR - https://www.scopus.com/pages/publications/33750928016

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DO - 10.1109/SBCCI.2005.4286825

M3 - Contribución a la conferencia

AN - SCOPUS:33750928016

SN - 1595931740

SN - 9781595931740

T3 - SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design

SP - 15

EP - 20

BT - SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design

T2 - SBCCI 2005 - 18th Symposium on Integrated Circuits and Systems Design

Y2 - 4 September 2005 through 7 September 2005

ER -

On the design of very small transconductance OTAs with reduced input offset

Abstract

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Keywords

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