TY - GEN
T1 - Bulk linearization techniques
AU - Arnaud, Alfredo
AU - Puyol, Rafael
AU - Hardy, Denisse
AU - Miguez, Matías
AU - Gak, Joel
N1 - Publisher Copyright:
© 2019 IEEE
PY - 2019
Y1 - 2019
N2 - The use of the bulk terminal to enhance the linear properties of the MOS transistor is examined. Firstly, bulk-linearization of a MOS differential pair is presented, including harmonic distortion measurements. Then bulk-degeneration technique is extended to the triode region to implement large MOS pseudo-resistors. A new asymmetric bulk-modified composite MOS with an equivalent saturation voltage of several hundred mV is introduced, and a 150MΩ pseudo-resistor by stacking a few of these stages is presented. Finally, bulk-linearization of the MOS differential pair and the MOS resistor are combined to implement a 6.4nS transconductor with above 1V linear range, consuming only 6nA, improving the compromise between linear range and power consumption of previously reported small transconductance OTAs.
AB - The use of the bulk terminal to enhance the linear properties of the MOS transistor is examined. Firstly, bulk-linearization of a MOS differential pair is presented, including harmonic distortion measurements. Then bulk-degeneration technique is extended to the triode region to implement large MOS pseudo-resistors. A new asymmetric bulk-modified composite MOS with an equivalent saturation voltage of several hundred mV is introduced, and a 150MΩ pseudo-resistor by stacking a few of these stages is presented. Finally, bulk-linearization of the MOS differential pair and the MOS resistor are combined to implement a 6.4nS transconductor with above 1V linear range, consuming only 6nA, improving the compromise between linear range and power consumption of previously reported small transconductance OTAs.
KW - Bulk-degeneration
KW - CMOS transistor
KW - Linearization
UR - http://www.scopus.com/inward/record.url?scp=85066798697&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2019.8702327
DO - 10.1109/ISCAS.2019.8702327
M3 - Contribución a la conferencia
AN - SCOPUS:85066798697
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019 - Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 IEEE International Symposium on Circuits and Systems, ISCAS 2019
Y2 - 26 May 2019 through 29 May 2019
ER -